Circuit-physics and digital-logic bridge at L1. Covers the ideal-circuit state variables (current, voltage, resistance), the circuit laws (Ohm, Kirchhoff), and the transition to digital logic (digital-signal → logic-gate →…
electronics
Electric current
The rate of flow of electric charge through a surface, i = dq/dt. Measured in amperes (A = C/s). The foundational kinematic quantity of…
Voltage (electric potential difference)
The work per unit charge required to move a test charge between two points in an electrostatic field: V_ab = -∫_a^b E·dl = U/q. Measured in…
Electrical resistance
The proportionality between applied voltage and the steady-state current it drives through a conductor, R = V/I. Measured in ohms (Ω =…
Ohm's law
For a linear ohmic resistor in steady state, the current through it is proportional to the voltage across it: V = IR. Experimentally…
Kirchhoff's current law (KCL)
At any node of an electric circuit, the algebraic sum of currents flowing in equals the algebraic sum of currents flowing out —…
Kirchhoff's voltage law (KVL)
Around any closed loop in an electric circuit, the algebraic sum of voltage drops equals zero. Follows from energy conservation applied to…
Electric circuit
A network of electrical elements (sources, resistors, capacitors, inductors, active devices) connected by conductors so as to form one or…
Digital signal
A signal whose amplitude is constrained to a small discrete set of levels — in the overwhelmingly common binary case, exactly two,…
Logic gate
A physical device (or schematic element) whose output digital-signal is a deterministic Boolean function of its input digital-signals. The…
NAND gate
A logic-gate whose output is the NAND (Sheffer stroke) of its inputs: output is LOW iff all inputs are HIGH. Because NAND is functionally…
Digital logic circuit
A network of logic-gates interconnected so that the outputs of some gates drive the inputs of others — combinationally (memoryless, output…
Operational amplifier (ideal/non-ideal)
Infinite A_OL, Z_in, zero Z_out ideal; real offsets, slew rate SR, GBW; inverting/non-inverting/integrator/differentiator topologies.
BJT Ebers–Moll model
I_C = I_S(e^(V_BE/V_T)-1), I_B = I_C/β; Early effect; small-signal hybrid-π; saturation, cutoff, active regions.
MOSFET square-law & short-channel
I_D = (μC_ox W/2L)(V_GS-V_T)²(1+λV_DS) in saturation; short-channel: velocity saturation, DIBL, subthreshold slope.
CMOS logic & scaling
Complementary nMOS+pMOS; static power near zero; Dennard scaling reign 1974-2005; FinFET, GAA for <10 nm nodes.
DRAM 1T1C cell
1 transistor + 1 capacitor; destructive read with sense amp; refresh every ~64 ms; scaling challenge at capacitor aspect.
Phase-locked loop (PLL)
Phase detector + loop filter + VCO; tracks reference phase; freq multipliers, clock recovery, FM demodulation; Type-II essential.
Switched-capacitor filters
Clocked capacitor emulates resistor R_eq = 1/(f_ck C); implements RC filters precisely on IC; used in ΣΔ-ADC, audio.
Σ-Δ ADC
1-bit quantizer in feedback loop; noise shaping pushes quantization energy out of band; decimation filter; 24-bit audio converters.
FFT & digital signal processing
Cooley–Tukey N log N DFT; overlap-add convolution; DSP chips, FPGAs; basis of software radio.
Photonic integrated circuits
Silicon photonics on SOI; modulators, detectors, waveguides; co-packaged optics for AI/HPC interconnects.
Power electronics: IGBT, GaN, SiC
IGBT combines MOS gate with BJT conduction; wide-bandgap GaN/SiC enable higher f, T; inverters for EVs, renewables.
Spintronics (GMR, TMR, MRAM)
Fert, Grünberg GMR (2007 Nobel); spin-valve read heads; STT-MRAM writes via spin-transfer torque; non-volatile memory.
NAND flash memory
Floating-gate transistor stores charge; multi-level cell (MLC/TLC/QLC) stores 2-4 bits; 3D NAND stacks 100+ layers.
Superconducting qubits (transmon)
Josephson-junction-based transmon with E_J/E_C ~ 50; microwave control; coherence times >100 μs; NISQ era processors.
Memristors & neuromorphic computing
Fourth fundamental 2-terminal element (Chua 1971; HP 2008); resistance depends on charge history; synaptic analog in ANN chips.